#include "7seg.h" #include static device_vtable_t const seg7_vtable = { seg7_read, seg7_write, seg7_deinit }; void seg7_init( seg7_t *seg, uint16_t addr, bool initialize ) { device_init( &seg->base, "seg7" ); seg->base.vtable = (device_vtable_t *)&seg7_vtable; seg->addr = addr; seg->debug = false; if( initialize ) { seg->latch = 0x0000; seg->shift = 0x0000; } } uint8_t seg7_read( void *obj, uint16_t addr ) { return 0; } void seg7_write( void *obj, uint16_t addr, uint8_t data ) { seg7_t *seg = (seg7_t *)obj; switch( addr - seg->addr ) { case DDRA: seg->ddr = data; break; case PORTA: // write bits from SER into shift register on positive SRCLK if( ( seg->ddr | ( SRCLK & SER ) ) && ( data & SRCLK ) ) { seg->shift = ( seg->shift << 1 ) | ( data & SER ); if( seg->debug ) { fprintf( stderr, "7seg shifting data, data is now %02X\n", seg->shift ); } } // copy shift to latch register on positive RCLK if( ( seg->ddr | RCLK ) && ( data & RCLK ) ) { seg->latch = seg->shift; if( seg->debug ) { fprintf( stderr, "7seg copying %02X from shift to latch\n", seg->latch ); } } break; // ignore writes to other addresses } } void seg7_deinit( void *obj ) { seg7_t *seg = (seg7_t *)obj; device_deinit( &seg->base ); }