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| author | Andreas Baumann <mail@andreasbaumann.cc> | 2020-11-18 18:24:02 +0100 |
|---|---|---|
| committer | Andreas Baumann <mail@andreasbaumann.cc> | 2020-11-18 18:24:02 +0100 |
| commit | 055ca03ed8ebadaafea285bf79f7e85529663bab (patch) | |
| tree | 4ed1e6b5ba105386380ac9874414ad8b99c054c1 /roms | |
| parent | 62fceb9b7aa4a4f019903d61e3cca1a548788e54 (diff) | |
| download | 6502-055ca03ed8ebadaafea285bf79f7e85529663bab.tar.gz 6502-055ca03ed8ebadaafea285bf79f7e85529663bab.tar.bz2 | |
saveing ALL registers when handling interrupts!
Diffstat (limited to 'roms')
| -rw-r--r-- | roms/7seg_counter_irq_timer_smart_update.asm | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/roms/7seg_counter_irq_timer_smart_update.asm b/roms/7seg_counter_irq_timer_smart_update.asm index 3f41a38..2b009de 100644 --- a/roms/7seg_counter_irq_timer_smart_update.asm +++ b/roms/7seg_counter_irq_timer_smart_update.asm @@ -14,8 +14,8 @@ SRCLK = %00000100 INTERVAL = 33 ; increase counter 3 times per scond CURRENT = $0 ; current counter -VISIBLE = $2 ; visible counter (as last printed to the 7-segment display) -TICKS = $4 ; internal ticks counter (on overflow increment counter) +VISIBLE = $1 ; visible counter (as last printed to the 7-segment display) +TICKS = $2 ; internal ticks counter (on overflow increment counter) .org #$f800 @@ -106,6 +106,8 @@ nmi: irq: pha + phx + phy bit T1LCL ; clear timer1 interrupt bit PORTA ; clear CA1 interrupt dec TICKS @@ -114,6 +116,8 @@ irq: sta TICKS inc CURRENT ; increment internal counter irq_done: + ply + plx pla cli rti |