diff options
| -rw-r--r-- | README | 2 | ||||
| -rw-r--r-- | roms/7seg_counter_irq_timer_smart_update.asm | 8 |
2 files changed, 8 insertions, 2 deletions
@@ -88,6 +88,8 @@ VCC on counters stabilize the circuit on slow clock 18.11.2020: playing with some cli, sei, having a copy of the counter and optimizing display (refresh on change only) +X and Y are not stored in the interrupt routine, why this is +extremely bad, is obious! :-) commands -------- diff --git a/roms/7seg_counter_irq_timer_smart_update.asm b/roms/7seg_counter_irq_timer_smart_update.asm index 3f41a38..2b009de 100644 --- a/roms/7seg_counter_irq_timer_smart_update.asm +++ b/roms/7seg_counter_irq_timer_smart_update.asm @@ -14,8 +14,8 @@ SRCLK = %00000100 INTERVAL = 33 ; increase counter 3 times per scond CURRENT = $0 ; current counter -VISIBLE = $2 ; visible counter (as last printed to the 7-segment display) -TICKS = $4 ; internal ticks counter (on overflow increment counter) +VISIBLE = $1 ; visible counter (as last printed to the 7-segment display) +TICKS = $2 ; internal ticks counter (on overflow increment counter) .org #$f800 @@ -106,6 +106,8 @@ nmi: irq: pha + phx + phy bit T1LCL ; clear timer1 interrupt bit PORTA ; clear CA1 interrupt dec TICKS @@ -114,6 +116,8 @@ irq: sta TICKS inc CURRENT ; increment internal counter irq_done: + ply + plx pla cli rti |