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authorAndreas Baumann <mail@andreasbaumann.cc>2017-06-10 21:26:24 +0200
committerAndreas Baumann <mail@andreasbaumann.cc>2017-06-10 21:26:24 +0200
commitd6d1bdfefafff50b7b6d15d218c0a188570be541 (patch)
tree15ee8de727d0be5d126efda146b2879de0a72773 /src/hardware/pci.h
parenteea5bf4b859eb56c5772c58ca54937a90a10e7ee (diff)
downloadabaos-d6d1bdfefafff50b7b6d15d218c0a188570be541.tar.gz
abaos-d6d1bdfefafff50b7b6d15d218c0a188570be541.tar.bz2
some big renames into subdirs of aspects
updated README removed size_t in sys/types.h and sys/types.h itself, size_t is in stddef.h
Diffstat (limited to 'src/hardware/pci.h')
-rw-r--r--src/hardware/pci.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/src/hardware/pci.h b/src/hardware/pci.h
new file mode 100644
index 0000000..ddbc990
--- /dev/null
+++ b/src/hardware/pci.h
@@ -0,0 +1,49 @@
+#ifndef PCI_H
+#define PCI_H
+
+#include <stdbool.h>
+
+#include "port.h"
+#include "interrupts.h"
+#include "driver.h"
+
+typedef struct {
+ uint16_t vendor_id;
+ uint16_t device_id;
+ uint8_t class_id;
+ uint8_t subclass_id;
+ uint8_t interface_id;
+ uint8_t revision_id;
+ uint32_t port_base;
+} pci_device_descriptor_t;
+
+typedef struct {
+ port32_t command_port;
+ port32_t data_port;
+} pci_controller_t;
+
+typedef enum {
+ BASE_ADDRESS_REGISTER_TYPE_IO,
+ BASE_ADDRESS_REGISTER_TYPE_MEMORY_MAPPED
+} pci_base_address_register_type_t;
+
+typedef struct {
+ pci_base_address_register_type_t type;
+ bool prefetchable;
+ uint8_t *addr;
+ uint32_t *size;
+} pci_base_address_register_t;
+
+void pci_controller_init( pci_controller_t *controller );
+
+uint16_t pci_controller_read( pci_controller_t *controller, uint16_t bus, uint16_t device, uint16_t function, uint32_t offset );
+void pci_controller_write( pci_controller_t *controller, uint16_t bus, uint16_t device, uint16_t function, uint32_t offset, uint32_t data );
+void pci_controller_scan_and_register( pci_controller_t *controller, driver_manager_t *driver_manager, interrupt_t *interrupt );
+
+void pci_device_descriptor_init( pci_device_descriptor_t *descriptor, pci_controller_t *controller, uint16_t bus, uint16_t device, uint16_t function );
+
+void pci_base_address_register_init( pci_base_address_register_t *base_address_register, pci_controller_t *controller, uint16_t bus, uint16_t device, uint16_t function, uint16_t bar );
+
+driver_t *pci_device_get_driver( pci_device_descriptor_t *descriptor, interrupt_t *interrupt );
+
+#endif // PCI_H